NVIDIA Blackwell vs Hopper: What 208 Billion Transistors Actually Buy You

For three years, NVIDIA's H100 GPU defined what AI infrastructure meant. Released in 2022 on the Hopper architecture, the H100 trained GPT-scale models faster than anything that came before it, won every MLPerf benchmark in its generation, and according to the 2026 AI Index Report, was used to train 28 notable AI models in 2025 alone. Then Blackwell arrived, and the numbers shifted so dramatically they require some explanation.

Why Hopper hit a reticle limit

The H100 is a monolithic chip manufactured on TSMC's 4N process. It contains 80 billion transistors across a single die measuring roughly 814 square millimeters, close to the maximum size that lithography equipment can expose in one shot, a physical constraint called the reticle limit. To add more transistors, NVIDIA would need to shrink the process node or change the architecture. For Blackwell, they changed the architecture.

The H100 SXM variant delivers 67 teraFLOPS of FP64, 1,979 teraFLOPS of FP16, and 3,958 teraFLOPS of FP8 (with sparsity). Its 80 GB of HBM3 memory provides 3.35 TB/s of bandwidth, and its fourth-generation NVLink carries 900 GB/s of GPU-to-GPU traffic. TDP peaks at 700 watts. These numbers were state of the art in 2022. By 2025, the compute demands of trillion-parameter reasoning models had grown well past what they could satisfy.

The chiplet solution: two dies, one GPU

NVIDIA's answer was the Blackwell B200. Instead of a single larger die, Blackwell packs two reticle-sized dies onto one module, connected by a 10 TB/s NV-HBI (NV High-Bandwidth Interface) die-to-die link. The two dies function as a single CUDA-programmed accelerator, so software sees one GPU. Together they contain 208 billion transistors, manufactured on TSMC's 4NP process, which is 2.6 times the transistor count of Hopper. The chiplet approach sidesteps the reticle limit by treating the package, not the die, as the unit of scale.

Power consumption rises accordingly. The B200's HGX form factor runs at 1,000 watts, compared to Hopper's 700 watts. Blackwell Ultra, the follow-on B300 variant, pushes to 1,400 watts and adds 288 GB of HBM3e memory versus the B200's 192 GB. These are liquid-cooled deployments, not air-cooled server racks.

Memory and interconnect: the bandwidth leap

The H100's 3.35 TB/s memory bandwidth was a meaningful advance over the A100's 2 TB/s. Blackwell doubles it again. The B200 ships with 192 GB of HBM3e at 7.7 TB/s, more than twice Hopper's figure. Blackwell Ultra reaches 8 TB/s with 288 GB of capacity, enough to fit a 300-billion-parameter model entirely in GPU memory without offloading. That matters because memory round-trips between GPU and CPU were one of the primary latency bottlenecks for large inference workloads.

NVLink also doubled. Hopper's fourth-generation NVLink delivered 900 GB/s per GPU. Blackwell's fifth generation carries 1,800 GB/s, using 18 links at 100 GB/s each. The NVLink Switch chip allows clusters of up to 576 GPUs to communicate in a non-blocking fabric, and a 72-GPU NVLink domain (NVL72) achieves 130 TB/s of aggregate GPU bandwidth. The GB200 NVL72 system connects 36 Grace CPUs and 72 Blackwell GPUs in a rack-scale liquid-cooled design, operating the entire domain as a single logical GPU for serving trillion-parameter models.

New precision formats: FP4 and the inference multiplier

Hopper introduced FP8 as a new low-precision format for inference, delivering 3,958 teraFLOPS sparse on the H100. Blackwell adds FP4 and FP6. The B200's FP4 throughput reaches 9,000 teraFLOPS (sparse), and Blackwell Ultra delivers 15 petaFLOPS of dense NVFP4 compute through 640 fifth-generation Tensor Cores. NVIDIA claims Blackwell Ultra reaches up to 50 times better performance than Hopper for agentic AI workloads, a figure driven by the combination of FP4 throughput, higher memory bandwidth, and the GB300 NVL72 rack-scale configuration.

The precision hierarchy matters because inference for large models is almost never FP64. Researchers run training in BF16 or FP32, then deploy in FP8 or FP4, accepting small precision reductions in exchange for large throughput gains. The new NVFP4 format includes rounding and scaling techniques that keep error within bounds for typical transformer inference. Cloud providers including Microsoft, CoreWeave, and Oracle Cloud Infrastructure began deploying GB300 NVL72 systems in 2025 for low-latency agentic coding workloads.

What this means for the H100's role today

The H100 is not obsolete. It remains the practical workhorse for most AI projects, cheaper to rent, more widely available, and backed by a mature software ecosystem. The B200 and B300 are expensive and scarce. For training models below roughly 70 billion parameters, an H100 cluster is still cost-effective. For inference on those same models, the H100's FP8 throughput handles most production traffic comfortably.

Where Blackwell wins decisively is at the frontier: training models above 100 billion parameters where H100's 80 GB memory forces tensor parallelism across multiple nodes, serving inference for 400-billion-plus parameter models where latency is critical, and running the next generation of agentic systems that call large models hundreds of times per task. Blackwell's 192 to 288 GB per GPU, combined with NVLink 5's 1.8 TB/s interconnect, changes the economics of that class of workload in ways the H100 simply cannot match. PromptingIndex will continue tracking architecture advances as NVIDIA's Rubin generation and competing designs from AMD and Google approach.